PeF: Poisson’s Equation-Based Large-Scale Fixed-Outline Floorplanning

نویسندگان

چکیده

Floorplanning is the first stage of VLSI physical design. An effective floorplanning engine definitely has a positive impact on chip design speed, quality, and performance. In this article, we present novel mathematical model to characterize nonoverlapping modules, propose flat fixed-outline algorithm based global placement approach using Poisson’s equation. The consists legalization phases. floorplanning, redefine potential energy each module for characterizing modules an analytical solution scheme, widths soft appear as variables in function can be optimized. Moreover, fast approximate computation scheme partial derivatives energy. legalization, defined horizontal vertical constraint graphs, eliminate overlaps between remained after by modifying relative positions modules. Experiments MCNC, GSRC, HB+, ami49_x benchmarks show that, our improves average wirelength at least 2% 5% small large-scale with certain whitespace, respectively, compared state-of-the-art floorplanners.

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Large-Scale Fixed-Outline Floorplanning Design Using Convex Optimization

A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first stage, an attractor-repeller convex optimization model provides the relative positions of the modules on the floorplan. The second stage places and sizes the modules using second-order cone optimization. With the relati...

متن کامل

Fixed-outline floorplanning: enabling hierarchical design

Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice of moves is fairly straightforward. In this work, we study the fixed-outline floorplan formulation that is more relevant to hierarchical design style and is justified for very large ASICs and SoCs. We empirically show th...

متن کامل

On Objective Functions for Fixed-Outline Floorplanning

-Fixed-outline floorplanning enables multilevel hierarchical design, where aspect ratios and area of floorplans are usually imposed by higher level floorplanning and must be satisfied. Simulated Annealing is widely used in the floorplanning problem. It is well-known that the solution space, solution perturbation, and objective function are very important for Simulated Annealing. In this paper, ...

متن کامل

Fixed-outline Floorplanning through Better Local Search

Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice of moves is fairly straightforward. In this work, we study the fixed-outline floorplan formulation that is more relevant to hierarchical design style and is justified for very large ASICs and SOCs. We empirically show th...

متن کامل

An iterative merging placement algorithm for the fixed-outline floorplanning

Given a set of rectangular modules with fixed area and variable dimensions, and a fixed rectangular circuit. The placement of Fixed-Outline Floorplanning with Soft Modules (FOFSM) aims to determine the dimensions and position of each module on the circuit. We present a two-stage Iterative Merging Placement (IMP) algorithm for the FOFSM with zero deadspace constraint. The first stage iteratively...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

سال: 2023

ISSN: ['1937-4151', '0278-0070']

DOI: https://doi.org/10.1109/tcad.2022.3213609